The present invention relates to a system for ensuring regular information "refreshing" of the storage elements of a semiconductor read-write memory in electronic binary data processing apparatus. In recent times semiconductor dynamic memories are commonly employed as the main memories in data processing apparatus. However, these memories are intrinsically volatile, that is the registered information fades out with the passing of time and may become completely lost. Therefore, these memories must be refreshed periodically and it is necessary to assure that the refreshing operation is carried out within a defined time interval.
A copending patent application entitled "Information Refreshing System in a Semiconductor Memory," filed Dec. 23, 1974, Ser. No. 535,267, which is assigned to the assignee of the present application, describes a refreshing system in which the storage elements of each integrated unit that constitute the main memory are organized in rows and columns of integrated units.
Each row of all the integrated units is subjected to refreshing cycles suitably and uniformly distributed in a convenient time interval and inserted in periods of normal operation of the data processing system. According to the above system, at fixed time intervals a memory cycle is utilized only for the refreshing of a row of all the integrated units and it is unavailable, i.e., "lost," for accomplishing the normal processing operations. If the number of the rows of the integrated units utilized is low and the frequency required for the memory refreshing cycles is therefore not too high, the refreshing system described in the above mentioned patent application operates well. However, with integrated units characterized by a large number of rows, the frequency of the refreshing cycles becomes unacceptable from a system point of view.